Three-Level Inverter-Based Static Var Compensator

ABSTRACT

In this thesis, the principles of operation, modeling and analysis of an advanced static VAr compensator (ASVC) which employs a neutral-point-clamped (NPC), three-level pulse-width modulation (PWM), voltage source inverter (VSI), have been investigated. For the three-level inverter, output terminal voltages vary between +V_dc/2 and 0 or –V_dc/2 and 0, whereas in the conventional PWM inverter output voltage vary between +V_dc/2 and –V_dc/2_. Thus, the blocking voltage of each switching device in three-level inverter is one half of dc-link voltage, whereas it is full dc-link voltage for two-level inverter. The harmonics content of three-level inverter output voltage is far less than that of the two-level inverter at the same switching frequency. The three-level inverter can therefore be operated at lower switching frequency without excessive harmonic content. And so, it has lower switching losses and higher efficiency. It is suitable for high-voltage and high-power applications

 

The principles of operation of various types of power system static VAr compensators are first reviewed, including their specific applications in power systems. Using d-q reference frame transformation, a mathematical model for the compensator is derived and analyzed to obtain the dynamic and steady-state characteristics. Two types of analyses carried out include phase angle control of the ASVC and simultaneous application of phase angle and modulation index of the switching pattern as control variables. Results obtained show that the proposed ASVC is stable and has low harmonics content. It requires small filter / reactive elements and hence it is economical and efficient. To improve the speed of response of the ASVC to system conditions, a Proportional-plus-Integral (PI) controller is usually employed in the control strategy. A PI controller has thus been designed and applied. A design example of the ASVC is also carried out to demonstrate its application. The software – implementation of these analyses is in the Matlab environment.

 

 

TABLE OF CONTENTS

Table of contents……………………………………………..………………iii

 

Acknowledgement ……………………………………………………………v

Abstract ……………………………………………………………………………..vi

List of Diagrams………………………………………………..……………….vii

 

List of tables……………………………………………………….…………xii

 

Abbreviations ……………………………………………………………….xiii

Symbols………………………………………………………………………xv

 

CHAPTER ONE:INTRODUCTION………………………………………1

 

1.1 Need for Reactive Power Compensation……………………………1

1.2 Static Var Compensator……………………………………….…….1

1.3 History of Var Compensation……………………………………………..2

1.4 Scope of Work………………………………………………….…..3

1.5 Thesis Goals………………………………………………………..4

1.6 Thesis Structure……………………………………………….……4

CHAPTER TWO: VAR COMPENSATOR TYPES AND COMPARISONS……………………………………………………………6

 

2.1 Types of static var compensators………………………………………8

2.2 Var Compensator Applications………………………………………..55

2.3 The three-level inverter-based ASVC…………………………………58

 

 

 

 

 

CHARPTER THREE: GENERATION OF INVERTER GATE SIGNALS AND  

MODELLINE OF THE ASVC……………………………………………65

3.1 Generation of Gate Signals using sinusoidal pulse-width modulation

(SPWM)………………………………………………………………………65

3.2   Selective harmonic elimination – Two-Level Inverter…………………….68

3.3 NPC (3-level) PWM inverter – Generation of Gate Signals……………74

3.4   Fundamental   frequency modulation method (FFM)………….………80

3.5 Modeling of the ASVC………………………………………………….88

CHAPTER FOUR: ANALYSIS OF THE ASVC………………………..95

 

4.1 Phase-angle (α) control…………………………………………………95

4.2 Phase-angle (α) and Modulation index (d) Control……………………104

4.3 Effects of compensator parameters on stability………………..………113

4.4 DC Analysis……………………………………………………………..115

 

CHAPTER FIVE:  DESIGN OF PROPORTIONAL-plus-INTEGRAL (PI)  

CONTROLLER AND ASVC…………………………………………………..117

 

5.1Design of PI Controller …………………………………..……..……117

 

5.2Design of ASVC………………………………………………….…….125

 

 CHAPTER SIX: CONCLUSION………………………………………133

 

 

 REFERENCES…………………………………………………………135

 

APPENDIX………………………………………………………………………………………………………………..…..139

 

 

 

 

CHAPTER ONE

INTRODUCTION

This work focuses on the description of circuit topology, principle of operation, modeling and analyses of the three-level, Pulse-width modulation (PWM) voltage source inverter (VSI)-based static var compensator (SVC), referred to as Advanced Static VAr Compensator (ASVC) [1]. The ASVC uses power electronic devices/circuits to control reactive power output to regulate bus voltage [2]

 

1.1   Need for Reactive Power Compensation

Reactive power is the product of voltage and current where the voltage and current are 90^o out of phase with one another. Hence reactive power flows one way for one-quarter of a cycle, and the other way for the next quarter of a cycle, in contrast to real or active power, which flows in one direction only. In other words the reactive power oscillates between the ac source and the capacitor or reactor, and the oscillation is at frequency equal to two times the rated value (50 or 60Hz). The currents associated with this reactive power flows through the conductor and cause extra losses. Most loads, including transformers, reactors, ac machines, transmission lines (series inductive reactance), etc draw lagging reactive power, making electric power system voltage to sag, whereas under light loads, the capacitance of high voltage lines can create excessive leading reactive power, causing the voltage at some locations to rise above the nominal value. Any modest reduction in transmission losses, by limiting the flow of load reactive current along the transmission lines, means considerable cost savings in both power capacity and energy production [3]. Arising new demands imposed on transmission networks due to environmental constraints will add more requirements, and hence more importance, to VAr compensation techniques.

 

1.2 Static VAr Compensator

Since the load varies from time to time, the reactive power balance in a grid varies as well. This results in unacceptable voltage amplitude variations, which may lead to voltage depression, or even voltage collapse. To control dynamic voltage swings under various system conditions and thereby improve the power system transmission and distribution performance, a fast acting Static VAr Compensator (SVC) is required to produce or absorb reactive power so as to provide the necessary reactive power balance for the system. Static VAr compensators have thus been used for years by utilities to control reactive power flow in transmission and distribution systems and

consequently, help to stabilize weak systems, minimize line losses, increase power transfer capability, enhance transient and steady-state stability, balance three-phase loads, damp oscillations, reduce voltage flicker and provide greater dynamic voltage regulation. Reactive power compensation can be implemented with VAr generators connected in parallel or in series with the transmission network.

 

1.3 History of Var Compensation

In the past, synchronous condensers, mechanically switched capacitors and inductors, and saturated reactors were applied as SVCs to control the system voltage. Shunt capacitors were first employed for power factor correction in the year 1914 [4]. Since the late 1960s, thyristor-controlled reactors (TCR) with fixed capacitor (FC), and thyristor-switched capacitors (TSC) have been in use [5].

 

More recently, voltage source inverter (VSI) based static VAr compensators have been considered for reactive power control. These are known as Advanced Static Var Compensators (ASVC). The earlier ASVCs for large-scale reactive power compensation were developed without the availability of high-power, self-commutated semiconductor switches; and they were required to reduce harmonics. The inverters employed in these ASVCs were made up of problematic series/parallel connections with special transformer arrangements in order to reduce harmonics caused by each inverter. The number of inverter stages and harmonic filter legs make this type of ASVC bulky, complicated and expensive. It also produced resonances as a result of harmonic current sources [6], [1], [7].

 

Consequently, pulse-width modulation (PWM) voltage source inverter was introduced into reactive power compensation. This ASVC has the two-level VSI as its main component. As well as being less cumbersome, they have greatly enhanced the speed of response to system conditions. However, heavy harmonic filter legs are required to reduce the injection of harmonic currents caused by low switching frequency PWM operation into the ac mains [8], [9].

 

A three-level, pulse-width modulation (PWM), voltage source inverter (VSI) or a neutral-point-clamped (NPC) inverter-based ASVC is a new development in reactive power compensation. In contrast with the two-level VSI compensator, the output voltage of the three-level inverter contains much less harmonics for the same switching frequency and the current is practically sinusoidal, leading to reduction in filter size. Thus, three level inverters can be operated at lower switching frequency without much harmonic currents injected into the ac system. Again, in the three-level inverter, the voltage stress of each switching device is one half of the dc-link voltage whereas it is full dc-link voltage for two level inverter; and so the power devices of the three-level inverter can be fully utilized in the high voltage range. So it is more suitable for high voltage and high power applications [10], [5], [7], [8].

 

1.4 Scope of Work

This thesis discusses the various types of SVCs employed in the power industry to inject or absorb reactive power. It dwells on the description and principles of operation of different configurations of SVC. The crux of the work is the modeling, ac and dc analyses of an SVC system, otherwise known as Advanced Static Var Compensator (ASVC) which employs a three-level, pulse-width modulation (PWM) voltage source inverter (VSI). The use of proportional-plus-integral (PI) controller to enhance speed of response of this type of ASVC to system conditions is presented. The objective of the thesis is to show the superiority of the three-level inverter based static VAr compensator over other conventional methods of reactive power compensation.

 

1.5 Thesis goals

Three main goals are set for this thesis:

• Study of the operations of various types of static var compensators (SVC).
• Dynamic and stability analysis of a three-level inverter-based static VAr compensator, referred to as ASVC.
• Design example of the said ASVC to realize optimum var compensation.

 

1.6 Thesis Structure

 

This thesis is structured in chapters summarized as follows:

Chapter one – Introduction: The need for, and the development of static VAr compensation have been reviewed.

 

Chapter two – Var Compensator types and comparisons: Features of different types of VAr compensators are described. Their operating principles are explained and compared with one another.

 

Chapter three – Generation of inverter gate signals and Modeling of the ASVC: the switching actions of the two-level and three-level inverters are considered and the harmonics contents of their output voltages compared. Reduction of harmonics by different switching methods such as selective harmonics elimination (SHE) and fundamental frequency modulation (FFM) is examined here. Modeling of the ASVC system using d-q transformation method is also undertaken. The result of this modeling is an equivalent circuit, which is used to carry out ac and dc analyses of the ASVC system.

 

Chapter four – Analyses of the ASVC: The equivalent circuit derived in chapter three is used for ac and dc analyses of the ASVC. Thus the dynamic characteristics of the compensator are shown here. Effects of circuit parameters on the Var compensator stability are also investigated by the use of root locus method.

 

Chapter five – Design of PI controller and an ASVC: To improve the speed of response of the ASVC, proportional-plus-integral (PI) controller is employed. The design of the PI controller is the subject of this chapter. A design example of an ASVC is also carried out to demonstrate its application.

 

Chapter six – Conclusion: Summarizes the advantages of the three-level VSI based ASVC over previous SVCs

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