TABLE OF CONTENTS
Title Page i
Approval Page ii
Certification iii
Dedication iv
Acknowledgement v
Abstract vi
Table of Contents vii
List of Tables xi
List of Figures xii
List of Abbreviations xvii
Chapter One 1
1.0 Introduction 1
1.1 Overview 1
1.2 Significance of the Study 2
1.3 Objective of the Study 3
1.4 Features of Multilevel Inverter 4
Chapter Two 7
2.0 Multilevel Inverter to Hybrid Multilevel Inverter 7
2.1 Multilevel Inverter Configuration 7
9
2.2 Working Principle of Multilevel Inverter 9
2.3 H-bridge Inverter 9
2.3.1 Bipolar Pulse-Width Modulation 11
2.3.2 Unipolar Pulse-Width Modulation 12
2.4 Diode Clamped Multilevel Inverter 14
2.4.1 Switching State 17
2.5 Flying Capacitor Multilevel Inverter 18
2.6 Cascaded Multilevel Inverter 21
2.7 Modulation Control Techniques 23
2.7.1 Classification of Different Modulation Techniques 23
2.7.2 Multi Carrier Pulse width Modulation 24
2.7.3 Carrier Disposition (CD) Techniques 25
2.7.4 Phase Disposition (PD) Technique 26
2.7.5 Phase opposition disposition (pod) technique 27
2.7.6 Alternative Phase Opposition Disposition (APOD) Technique 28
2.7.7 Phase Shifted (PS) Technique 30
2.7.8 Hybrid Modulation Techniques Hybrid PWM (H-PWM) 31
2.7.9 Hybrid Modulation Strategy 31
2.8 Hybrid Multilevel Inverter 33
2.9 Classification of Hybrid Multilevel Inverter 33
2.9.1 Asymmetric Hybrid Multilevel Inverter 34
2.9.2 Hybrid Multilevel Inverter Based on Half-Bridge Modules 36
2.9.3 New Symmetrical Hybrid Multilevel Inverters 38
10
2.9.4 Hybrid Clamped Five-Level Inverter Topology 40
2.9.5 Distinct Series Connected Cells Hybrid Multilevel Inverter 41
2.9.6 Hybrid Medium-Voltage Based on a NPC Inverter 43
2.9.7 Hybrid Multilevel Inverter Based on Main Inverter and
Conditioning Inverter 44
2.9.8 New Hybrid Asymmetrical Multilevel H-Bridge Inverter 46
2.9.9 Hybrid Multilevel Inverter with Single DC Source 47
Chapter Three 51
3.0 Proposed Hybrid Modulation Strategy for Cascaded H-Bridge
Multilevel Inverter 51
3.1. Base Switching Signal Generator 54
3.2 Module Signal Equalizing Generator 54
3.3 Gating Signal Sequence Generator 55
Chapter Four 59
4.1 Simulation Results for Multilevel Inverter and Hybrid strategy for cascaded
H-bridge 59
4.1.1 Five-Level cascaded multilevel inverter 59
4.1.1.1 Five-Level Cascaded Multilevel Inverter with Staircase Technique 59
4.1.1.2 Five-Level Cascaded Multilevel Inverter with Phase Disposition
Modulation Technique 61
4.1.2 Seven-Level Cascaded Multilevel Inverter 62
4.1.2.1Seven-Level Cascaded Multilevel Inverter with Staircase Technique Using
Three H Bridges 62
11
4.1.2.2 Seven Level Cascaded Multilevel inverter with phase Disposition Modulation
Technique 65
4.1.3 Nine-Level Cascaded Multilevel Inverter 67
4.1.3.1 Nine-Level Cascaded Multilevel Inverter with Staircase Technique Using
Three H Bridges 67
4.2 Hybrid Strategy for Cascaded H-bridge Multilevel Inverter 70
Chapter Five
5.1 Experimental Results 74
5.2 Single Carrier Sinusoidal Pulse Width Modulation (SCSPWM) 75
5.3 Rectified Single Carrier Sinusoidal Pulse Width Modulation (SCSPWM) 76
5.4 Triangular Carrier Signal 77
5.5 Comparing of a Rectified Sine wave with a Triangular Wave Signal 78
5.6 comparing of Offset of the Rectified Sine Wave with Triangular wave signal 78
5.7 Logic Output Pulse Signals a, b, c, d, A, B, C and D. 81
5.8 Base Switching Signal Generators U4, V4, U3, V3, U2, V2, U1, V1. 84
Chapter Six 88
6.1 Conclusion 88
6.2 Recommendation 89
Reference 90
Appendix One 95
Appendix Two 96
12
CHAPTER ONE
1.0 Introduction
Multilevel inverters (MLI) have very significant development for medium voltage and high
power application due to their ability to synthesize waveforms with better harmonic spectrum.
Multilevel inverters refer to the inverters with output which have more than two voltage levels
possible with respect to pole. The attribute of having an output voltage level that is higher than
those of the power semiconductor switching devices’ ratings puts the MLIs in high power
inverters class. The application of MLIs has been extended to the medium power range due the
advantages of reduced distortion, dv/dt stress and common mode voltage [1]–[3].
1.1 Overview
Cascaded H-bridge (CHB) multilevel inverter is one of the popular converter topologies used in
high-power medium-voltage (MV) drives [1–3]. It is composed of a multiple units of singlephase
H-bridge power cells. The H-bridge cells are normally connected in cascade on their ac
side to achieve medium-voltage operation and low harmonic distortion. In practice, the number
of power cells in a CHB inverter is mainly determined by its operating voltage and
manufacturing cost. For instance, in the MV drives with a rated line-to-line voltage of 3300 V, a
nine-level inverter can be used, where the CHB inverter has a total of 12 power cells using 600V
class components [1]. The use of identical power cells leads to a modular structure, which is an
effective means for cost reduction.
The CHB multilevel inverter requires a number of isolated dc supplies, each of which feeds an
H-bridge power cell. The dc supplies are normally obtained from multi-pulse diode rectifiers.
For the seven and nine-level inverters, 18 and 24 pulse diode rectifiers can be employed,
respectively, to achieve low line-current harmonic distortion and high input power factor.
23
The cascaded H-bridge inverter (CHB) is a MLI topology with a modular structure. The main
disadvantage of a CHB inverter is the need for a large number of isolated dc supplies [4]-[6]. To
ease this problem, hybrid multilevel inverters created by cascading smaller dissimilar inverter
circuits are suggested [7].
Hybrid inverters have different approaches to achieve the goal of multilevel output such as:
Employing different power switches like Gate turn-off thyristor (GTO) and insulated-gate
bipolar transistor (IGBT) in cascade thus operating at low and high frequency[8] or modifying
the series connection of cascade connected MLI [9] or obtaining multilevel output with
combination of inverter and converter[10],[11] or replacing the dc supply of the lower voltage
stages with capacitors and controlling the inverter to receive zero average power from the
capacitor-fed stages [12], [13] or replacing the highest voltage cascaded stages with a singlysupplied
inverter such as a basic two-level, six-switch inverter [14] or a multilevel neutral point
clamped stage [15] or supplying various hybrid inverter stages using the same dc source and
isolating the outputs using a multi primaries transformer [16], [17] but this option is not suitable
when a wide frequency range including very low frequency is needed and also by applying half
bridge inverter cascaded with H-bridge inverter[18] with single DC source or separate DC
sources.
1.2 Significance of the Study
Multicarrier pulse width modulation (PWM) inverters have been developed to overcome
shortcomings in solid-state switching device ratings, so that large motors can be controlled by
high power adjustable-frequency drives. Multilevel inverters can operate at both fundamental
switching frequency and high frequency switching.
24
The different PWM schemes of multilevel inverters are classified into two types the multi carrier
Sub-Harmonic pulse width modulation (MC-SH PWM) and the multi carrier switching
frequency optimal pulse width modulation (MC-SFO PWM), Sub Harmonic PWM (SHPWM),
Phase Shift PWM (PSPWM), Variable Frequency PWM (VFPWM) and Carrier Overlapping
PWM (COPWM) techniques employed for various modulation indices using spectrum of the
output voltage. Other performance measures from above modulation techniques such as crest
factor, form factor etc. and the use of inverter state redundancies to perform additional
application specific control tasks. For all above modulation techniques, the switching devices of
the main power stage switch once per cycle for different modulation indices. This is suitable for
the high power semiconductor devices. Stress on the devices is reduced and Total Harmonic
Distortion (THD) is also reduced.
1.3 Objective of the Study
The multi-carrier PWM method uses several triangular carrier signals, keeping only one
modulating sinusoidal signal. For an n level inverter n-1 carriers are employed [19] – [20]. The
carriers have the same frequency and same peak to peak amplitude but are disposed so that the
bands they occupy are contiguous. The zero reference is placed in the middle of the carrier set.
The modulating signal is a sinusoid of frequency 50Hz. At every instant each carrier is compared
with the modulating signal. Each comparison gives high level or low level output if the
modulating signal is greater or smaller than the triangular carrier respectively. The results are
added to give the voltage level, which is required at the output terminal of the inverter.
Different multicarrier PWM methods include Phase Disposition (PD) Method [21], Alternative
Phase Opposition Disposition (APOD) Method, Phase Opposition Disposition (POD) Method,
Phase Shifted (PS) Method [22] and Hybrid Modulation Technique [23]-[26]. Different
25
modulation techniques for hybrid multilevel inverter are studied in simulations and results are
compared.
This project will have an impact such that THD and stress on the devices are reduced. It is aimed
at developing a switching scheme for CHB multilevel inverter using a 4-cell cascaded structure.
There are several types of multilevel inverters but the one considered in this work is the hybrid
modulation strategy for cascade H-Bridge multilevel inverter (HCMLI). HCMLI has many
distinct features particularly in terms of its structure which is simple and modular.
Most multilevel inverters have an arrangement of switches and capacitor voltage sources. By a
proper control of the switching devices, these can generate stepped output voltages with low
harmonic distortions. These multilevel inverters are widely used in manufacturing factories and
acquired public recognition as one of the new power inverter fields because they can overcome
the disadvantages of traditional pulse width modulation (PWM) inverters.
1.4 Features of Multilevel Inverter
Thus features of a multilevel inverter can be summarized as follows:
Output Waveform Quality: Multilevel inverters can generate the output voltages with
very low distortion and reduced dv/dt stresses can be achieved therefore electromagnetic
compatibility (EMC) problems can be minimized. Hence output waveform quality is
improved.
Common-Mode (CM) Voltage: Multilevel inverters produce smaller CM voltage
therefore the stress in the bearings of a motor connected to a multilevel motor drive can
be reduced. Furthermore CM voltage can be eliminated by using advanced modulation
strategies such as that proposed in [13]. Thus common mode voltage is reduced.
26
Input Current Distortion: Multilevel inverters can draw input current with low
distortion.
Switching Frequency: Multilevel inverters can operate at both fundamental switching
frequency and high switching frequency PWM. It should be noted that lower switching
frequency usually means lower switching loss and higher efficiency.
High Voltage Capacity: Multilevel inverter structure can be utilized in high and medium
voltage applications.
Low THD and dv/dt: The output waveform voltages is composed of voltage levels
greater than three which leads to lower THD and dv/dt in comparison to the two-level
inverter operating at the same voltage rating and device switching frequency. Multilevel
inverters do have some disadvantages. One particular disadvantage is the greater number
of power semiconductor switches needed. Although lower voltage rated switches can be
utilized in a multilevel inverter each switch requires a related gate drive circuit. This may
cause the overall system to be more expensive and complex. Also the capacitor banks or
insulated sources needed to achieve the voltage steps on the DC buses.
A new hybrid modulation strategy for cascaded H-Bridge Multilevel inverter is performed using
MATLAB/SIMULINK (2007) in discrete model. The features and discussions of research
carried out in the thesis include:
v Chapter one focus on General Introduction of the Project/Multilevel Inverter.
v Chapter two deals with Multilevel Inverter to Hybrid Multilevel Inverter.
v Chapter three Proposed Hybrid Modulation Strategy for Cascaded H-Bridge Multilevel
Inverter.
v In Chapter Four, Simulation Result of Multilevel Inverters was shown.
27
v Chapter Five is the Experimental Result of Hybrid Modulation Strategy for Cascaded HBridge
Multilevel Inverter.
v Chapter six present the Conclusion and Recommendation.
28
Do you need help? Talk to us right now: (+234) 08060082010, 08107932631 (Call/WhatsApp). Email: [email protected].
IF YOU CAN'T FIND YOUR TOPIC, CLICK HERE TO HIRE A WRITER»
